1. Field of the Invention
This invention relates to the fabrication of a magnetic tunneling junction (MTJ) cell and more particularly to the nature of the etching processes used in the fabrication.
2. Description of the Related Art
The magnetic tunneling junction (MTJ) device, is a form of giant magnetoresistive (GMR) device in which the relative orientation of uni-directional magnetic moments in parallel, vertically separated upper and lower magnetized layers, controls the flow of spin-polarized electrons tunneling through a very thin dielectric layer (the tunneling barrier layer) formed between those layers. When injected electrons pass through the upper layer they are spin polarized by interaction with the magnetic moment of that layer. The probability of such an electron then tunneling through the intervening tunneling barrier layer into the lower layer then depends on the availability of states within the lower electrode that the tunneling electron can occupy. This number, in turn, depends on the magnetization direction of the lower electrode. The tunneling probability is thereby spin dependent and the magnitude of the current (tunneling probability times number of electrons impinging on the barrier layer) depends upon the relative orientation of the magnetizations of magnetic layers above and below the barrier layer.
When used as a magnetic read head, the magnetic moment of the lower magnetized layer is fixed (pinned) in direction, while the magnetic moment of the upper magnetized layer is free to vary continuously under the action of the magnetic field of a moving magnetic medium (i.e. a disk). In that application, therefore, the MTJ device can be viewed as a kind of variable resistor, since different relative orientations of the magnetic moments will change the magnitude of a current passing through the device. When used as an information storage element in a magnetoresistive random access memory (MRAM) cell array, the magnetic moment of the upper layer is only allowed to have two orientations, parallel or antiparallel to the magnetic moment of the lower magnetized layer. In this case, the cell behaves as a resistor with only two resistance values, high (antiparallel) and low (parallel), which are treated as logical 1 and 0.
One of the critical challenges in MRAM technology is the patterning of the MTJ stack materials to form an MRAM cell. The term “stack,” as used here, refers to the unpatterned, deposited layered structure of conducting, magnetic and dielectric materials. The phrase, “patterning of the stack,” or the like, as used here, refers to the reduction of the lateral dimensions of the stack to the desired dimensions of the cell, typically accomplished by etching away portions of the stack peripherally disposed about an etch mask formed on the upper surface of the stack. Because the MTJ stack includes a very thin tunneling barrier layer, typically a layer of AlOx or MgO approximately 10 to 20 angstroms in thickness, shorting or shunting of the current around the junction is a critical problem. Clearly, imprecise patterning could create shorting pathways along the lateral edges of the cell. In addition, precise control of the size and shape of the MTJ cell during its patterning is increasingly important because these factors affect the magnetic and switching properties of the cell.
FIG. 1 is a schematic cross-sectional view of a typical prior art MTJ stack. The lower one (20) of the two magnetized layers, hereinafter called a pinned layer, has the direction of its magnetic moment fixed in direction, while the magnetic moment of the upper or free layer (40) can have its magnetic moment parallel to or antiparallel to the magnetic moment of the pinned layer. Looking at the figure from the bottom up, the layer configuration includes a substrate (130), which could be a bottom electrode used in read operations on the completed cell. A seed layer (5) that is used as a foundation on which to form successive overlayers is formed on the substrate. A layer of antiferromagnetic material, the AFM layer (10), is formed on the seed layer and will be used to pin the magnetic moment of the pinned layer by a form of magnetic coupling called exchange coupling. The lower, pinned layer (20) is a layer of ferromagnetic material formed on the AFM layer, or it can be a pair of ferromagnetic layers separated by a non-magnetic coupling layer. The tunneling barrier layer or junction layer (30) is then formed on the pinned layer, typically by first forming a layer of a metal such as aluminum (or magnesium) and then subjecting the aluminum (or magnesium) to oxidation. The free layer (40) is a ferromagnetic layer that is then formed on the junction layer.
FIG. 2 is a typical prior art configuration showing, schematically, a patterned MTJ cell (180) formed from the stack of FIG. 1. The cell is located between vertically separated conducting lines, the horizontally directed upper line (200) being a bit line and the transverse lower line (210) being a word line. A bottom electrode (130), such as the substrate in FIG. 1, contacting the bottom surface of the MTJ cell, is used to facilitate read operations and is electrically connected (by a conducting plug (140) passing through a via (145)) to circuitry, including a gate transistor (150) that controls the operation of the MRAM array. A protective, conducting capping layer (115), typically a layer of Ta in the prior art, is formed on the upper layer of the cell (180) as a result of the prior art patterning process as will be explained below
By sensing the resistance state of the cell (180), which requires the passage of a current through the cell, the cell is “read,” and by changing the resistance state, which requires an external magnetic field produced by the adjacent current-carrying conductors (200) and (210), the device is written upon.
As has been noted above, the cell of FIG. 2 has been patterned by etching away lateral portions of the stack of FIG. 1. One earlier prior art method of producing such an etch is by use of an ion-beam etch (IBE). Unfortunately, the IBE has several disadvantages, including non-selectivity, re-deposition of etched materials and the production of a tapered tail profile on the lateral etched edges of the stack. More recently, the reactive-ion etch (RIE) has supplanted the IBE as a prior art method of choice. An exemplary and commonly used method for producing a RIE is a process and corresponding system for carrying out the process, commercially supplied by Anelva. In this particular form of the process the RIE is occurs within a process chamber using a mixture of gases such as CO and NH3 or CH3OH, or C2H5OH, to etch the stack layers. The process proceeds most effectively by forming an etch resistant, patterned Ta hard mask on the upper surface of the MTJ stack and etching away those portions of the stack that are laterally disposed beyond the peripheral borders of the mask. Subsequent to the masking and etching, the Ta mask is allowed to remain on the patterned cell as a capping layer.
As a RIE hard masking material, Ta has some disadvantages. Among these disadvantages is the poor adhesion of Ta to dielectric layers, such as layers of SiN, SiO2, F-doped SiOx and C-doped SiO2 that are applied onto and around the patterned cell as insulating layers or interlevel dielectrics (ILD). This poor adhesion results in the peeling off of these dielectric layers from the Ta capping layer while the dielectric layers are smoothed and rendered planar (planarized) by processes such as chemical mechanical polishing (CMP). Experiments carried out by the present inventors have shown that the peeling off of the dielectric films was exacerbated if the SiO2 was polished by CMP subsequent to an initial deposition of a layer of SiN. Thus, the efficacy and quality of the CMP process is compromised by the lack of adhesion of dielectric materials to the Ta capping layer. Another problem encountered when using the Ta hard mask was the oxidation of the Ta to form TaO by the RIE application of the gases noted above. Such oxidation increases the electrical resistance of the Ta layer and, therefore, adversely affects the electrical performance of the cell.
Because of the aforementioned disadvantages of the Ta hard mask layer in RIE patterning of MTJ stacks, it is clear that an alternative masking structure is needed.
The common use of the RIE in the industry at many stages of MRAM array fabrication produces a great deal of published prior art that discloses a Ta hard mask and its use in an associated RIE. There is also prior art that discloses alternative masking materials and methods. For example, Costrini et al. (US Published Patent Application 2005/0277207) disclose an RIE process in which a succession of masks are used, including a Ta or TaN hard mask between 1500 and 6000 angstroms in thickness, over which is formed a thicker mask that is subsequently removed. In the disclosed process, the thicker mask is a sacrificial mask and the hard mask remains as a capping layer. Kim et al. (U.S. Pat. No. 6,806,096) also discloses a hard mask of Ta, TiN or TaN over which is formed an insulating layer of SiN or SiO2. Ning (U.S. Pat. No. 6,635,496) teaches a method of depositing a Ta mask that does not require patterning in the standard way.
Leuschner et al. (U.S. Pat. No. 6,815,248) teaches a superposition of masks in which an upper or lower mask is formed of WN and a corresponding lower or upper mask is formed of TiN or TaN. Gaidis et al. (US Patent Application Publication 2005/0277206) teaches the use of a TaN or TiN hard mask that is removed to allow a partial deactivation of a free layer by an oxidation process. Nakajima et al. (U.S. Pat. No. 6,916,677) teaches a hard mask that is peeled off. Asao et al. (U.S. Pat. No. 6,900,490) and Asao (U.S. Pat. No. 6,882,563) teach the formation of an MTJ cell with a curved shape that corresponds to the curvature of magnetic field lines. A Ta mask is used to pattern the curved cell. Park et al. (U.S. Pat. No. 6,849,465) teaches a first patterning of a lower electrode followed by a second patterning of a magnetically soft layer formed on the lower electrode using a hard mask of either Ti, TiN, Ta, or TaN.
The present invention prefers to retain the basic Ta layer because of its advantageous capping properties, while forming an additional layer of TaN over the Ta layer to both protect the Ta layer and to provide advantageous adhesion properties with respect to surrounding dielectric layer formation.